This invention relates to analog-to-digital converters using multiple conversion channels to increase the conversion rate, and more particularly, to reducing errors in such conversion arrangements.
Analog-to-digital converters are used to provide a sequence of digital code representations of numbers in any number base where each of such numbers corresponds to a point on an analog (varying only continuously with time) input signal waveform occurring with respect to a reference. That is, the digital code representation of a sequence of numbers is related to the magnitudes of a corresponding sequence of points in the analog input signal and to the fixed magnitude of a reference level signal.
Such analog-to-digital converters compare the magnitude taken by the analog input signal at a point in time to the reference level magnitude and attempt to provide an approximation of this relationship in a short sampling time interval by a digital code representation. This conversion process may be expressed by the analog input signal magnitude being taken equal to the product of the reference level, the output "estimating number" that is represented by the digital code representation, and a "transfer function parameter" which is just equal to the number 1 for linear converters. However, this transfer function parameter may vary as a function of estimating numbers found earlier in the conversion process, or as a function of the current or earlier analog input signal magnitudes, or both, to thereby result in a nonlinear converter.
The input signal and the reference signal may each be nearly any analog quantity such as voltage, current, charge, etc. while the estimating number and the transfer function parameter will usually be dimensionless. However, if the analog input signal is a physical variable of a type differing from that representing the reference signal, the transfer function parameter will be of units which relate the two signals, e.g. ohms if the input signal is in volts and the reference signal is in amps.
FIG. 1 provides a graph (broken-line 1) of a typical relationshiop between analog input signal magnitude, x, and the corresponding converter output estimating number, x. This "staircase" graph is commonly known as the "quantizing characteristic" and relates the various quantization levels provided by the converter, each of which is represented by some digital code, to a corresponding subrange of analog input signal magnitudes. Here in FIG. 1, the various quantized output levels in the range for graph 1 are shown as being R in number ranging from 0 through R-1. The number of quantization levels in the quantizing characteristic for a given analog input signal magnitude range determines the the number of corresponding subranges in this range, and so is related to the size of the subranges or increments in the input signal magnitude which the converter can distinguish between, i.e. the resolution of the converter.
Also shown in FIG. 1 is the "characteristic line" for this analog-to-digital converter labelled (1), this being a "linear" converter in that the various magnitudes of x are sufficiently close to the nominal corresponding values of x. Characteristic lines are usually defined by the line passing through the midpoints of the first and last output quantization transitions, that is, the first and last vertical segments in the quantizing characteristic. The slope of the characteristic line is the "gain" of the converter, and the intercept of the characteristic line with the x axis is the converter "offset". Alternatively, the characteristic line can be defined by the use of statistical methods to provide a line which optimally, in some sense, best represents the quantizing characteristic. Typically, that will be the line which reduces the mean squared error of the quantizing characteristic about the characteristic line to a minimum.
The quantizing characteristic (2) and characteristic line (2) of a second converter are also shown in FIG. 1. There is an error in the response to input signals of the second converter which is an error in gain because of different slopes between characteristic line (2) of this converter and the desired characteristic line of a converter which is that shown for converter 1. The second converter also shows an offset error because of displacement of characteristic line (2) from the zero value on the x axis.
The linearity of an analog-to-digital converter intended to be linear indicates the degree with which the estimating numbers represented by the digital codes provided by the converter in response to input signals accurately reflect the magnitudes of such input signals excluding any gain or offset errors. Expressions of linearity are usually based on the nominal quantizing step increment. Departures from exact linearity, termed linearity errors or nonlinearities, are usually caused by some components in the converter not being matched in electrical characteristics. This leads to a quantizing characteristic which is either (i) not uniform in the increments of the quantizing steps, usually termed differential nonlinearity, or (ii) is not uniform in its distribution about an associated characteristic line, usually termed integral nonlinearity, or which exhibits a combination of both differential nonlinearity and integral nonlinearity.
Turning to FIG. 2, more precise definitions of differential nonlinearity and integral nonlinearity can be given. Differential nonlinearity is defined as the maximum absolute difference between the nominal step increment and any x.sub.i+1 -x.sub.i. Integral nonlinearity is defined as the maximum absolute difference between any x.sub.cl intsct,i -x.sub.i or any x.sub.i+1.sup.-x.sub.cl intsct, i and one half of the nominal step increment, where x.sub.cl intsct,i is the value of x at the point the quantizing characteristic is intersected by the associated characteristic line between the analog input signal increment points x.sub.i and x.sub.i+1.
In extreme cases, these nonlinearities can result in a "missing code error" as is shown in FIG. 3, or in converter behavior which is not monotonic as is shown in FIG. 4. In FIG. 3, for instance, one estimating number and its corresponding digital code is never presented because the quantizing characteristic is so maldistributed, while in FIG. 4 estimating numbers are presented which are not always monotonically related to the input signal.
A further aspect of analog-to-digital converters of major interest is the rate at which digital code representations can be provided of magnitudes ocurring in the analog input signal, i.e. the conversions per second which the converter can supply. This is of major interest because each conversion provides a digital code output which represents the best estimate of a sample of the magnitude of the analog input signal at a point in time. The well-known sampling theorem requires that the sampling frequency be at least twice the highest frequency component contained in the analog input signal if that signal is to be accurately represented by the sum of the samples thereof represented by the analog-to-digital converter sequence of output digital code representations. Thus, the maximum conversion rate of an analog-to-digital converter, that is, the rate the converter can achieve without significant degradation in its performance, sets a limit on the frequency content of any analog input signal which is to be accurately converted into a sequence of digital code representations.
In addition to not unacceptably limiting the rapidity of variation in time of a time varying analog input signal, the dynamic performance of an analog-to-digital converter must not introduce an unacceptable amount of noise into the converter output representation of the analog input signal. Often, such a converter is evaluated based upon the spectrum of its output sequence of digital code representations when reconstructed by a laboratory quality digital-to-analog converter into an analog signal. Comparison of the frequency spectrum of such a reconstructed output with the frequency spectrum of the original analog input signal allows a determination to be made of such converter dynamic behavior.
If the analog-to-digital converter is essentially ideal, the spectrum of the reconstructed output will (for frequencies up to half of the conversion or sampling rate, i.e. the Nyquist frequency) be just that of the analog input signal plus the addition of a noise component determined by the resolution of the converter. This additional noise component is caused by the analog-to-digital converter unavoidably incurring some error in the digitizing process because the converter has a finite resolution. This finite resolution leads to a quantizing error which will occur even if the converter is otherwise exhibiting perfect behavior.
If there are no significant nonlinearities, such as differential nonlinearities or integral nonlinearities, and if the analog input signal is not phase-locked, that is, synchronous, with the analog-to-digital converter sampling rate, then the additional noise component is determined only by the number of quantizing steps resolvable by the converter and appears in the form of white noise for a linear converter. If the converter also exhibits some nonlinearities, an additional digitizing error occurs which appears as harmonic distortion in the reconstructed output signal.
Analog-to-digital converters of a very wide variety are known, but for most converters the estimating numbers and the corresponding digital code representations are determined by comparing the analog input signal with one or more internally generated signals which are derived from the reference level, usually a fixed value level. (A varying reference level is sometimes used to achieve division of the analog input signal by the varying reference signal.) Each estimating number obtained corresponds more or less with one subrange of magnitudes possible to be taken by the analog input signal over its magnitude range, and the end points of such a subrange correspond with values of such internally generated signals. Through a parallel or sequential procedure for comparing the analog input signal magnitude found in a sample with the various possible internally generated signal values, the subrange of magnitudes which contains the magnitude of the analog input signal is selected by the converter. Once this "best estimate" of the analog input signal sample magnitude is determined, the digital code representation uniquely associated with this magnitude subrange is then typically presented at the converter output.
In sequentially proceeding converters, approximations of an analog input signal magnitude sample are made sequentially in time with each approximation being followed by a comparison between the sample magnitude and the current estimate. Based upon this comparison, the approximation is modified so that a new estimate is made which is either closer to the value of the sample magnitude or which "brackets" such magnitude value with respect to the previous estimate. "Bracketing" of the sample magnitude will occur when the previous estimate was too small (or too large) and the succeeding estimate was too large (or too small) giving a known region of uncertainty within which the analog input signal sample magnitude occurs.
In this way, each new comparison results in an estimating value which is closer than the previous estimating value to the analog input signal sample magnitude, or results in a bracketing of the sample magnitude by an ever decreasing amount. The modification of the estimating value may be in constant increments as in the case of an "integrating" or "counting" converter, or may become successively smaller as in a "successive-approximation" converter. Once the present approximation sequence is completed, a corresponding digital representation is provided, and a new sample of the analog input signal can be taken and the approximation sequence then repeated.
In a parallel proceeding converter, or "flash" converter, the comparison procedure occurs in one step or perhaps, at most, a few sequential steps. The basic flash analog-to-digital converter technique employs 2.sup.n -1 voltage sources, 2.sup.n -1 approximately simultaneously operating voltage comparators, and miscellaneous encoding circuitry to achieve an n-bit, binary number digital code representation of an analog input signal sample in a single step. This step is then repeated for each new sample. Such a system is shown in FIG. 5 wherein an overflow output from an additional voltage source and comparator is shown provided to the encoding circuitry to indicate those instances in which the analog input signal sample magnitude exceeds the converter input range.
The voltage sources are typically provided in simplest form by a string of 2.sup.n resistors, 10, connected between two reference value voltage supplies, 11 and 12, shown as having fixed voltage values of V.sub.R+ and V.sub.R.sub.-, respectively, in a voltage divider arrangement. Thus, each of the voltage sources or reference signals are the voltages appearing at the connections between the resistors in string 10 except for the overflow reference signal which is equal to V.sub.R+. The analog input signal, V.sub.in, is supplied at an input, 13.
Alternatives to a resistive voltage divider arrangement for providing reference voltage sources are many. For instance, field-effect transistors can be operated as controlled vaue resistance, one of which could be substituted for each of resistances 10. For that matter, an actual resistor, such as a field-effect transistor, or any other arrangement substantially a resistor electrical equivalent could serve as an effective resistance for each of resistors 10. Another possibility for providing reference voltage supplies would be a series of independent voltage sources. Any other arrangement which provides fixed value voltages over at least a small time interval to serve as reference voltages would be suitable.
The set of 2.sup.n comparators, 14, are shown in FIG. 5 to each have three inputs in addition to at least a pair of electrical energization inputs for supplying electrical energy thereto which are not shown. The three inputs shown are an inverting input, a non-inverting input and, between them, a clocking input. A signal of a polarity applied to a comparator inverting input tends to force the comparator output signal toward the opposite polarity while the same signal applied to the non-inverting input tends to force the comparator output signal to a value of the same polarity. These results occur, however, only when permitted by clocking signal .phi. from a clocking signal source, 15, to which the comparator clocking inputs are shown connected. One of the inverting or non-inverting inputs of each comparator is connected to a corresponding intersection between two of the resistors in resistor string 10 to obtain a reference signal therefrom, and the remaining one of these inputs is connected to input 13.
The comparators of set 14 typically each comprise a substantially linear voltage amplifier of a selected gain having an inverting input and a non-inverting input and an output. A signal of a polarity applied to the amplifier inverting input forces the output signal to the opposite polarity while such an input signal at the non-inverting input forces the output signal to a value of the same polarity. Such an amplifier is followed in cascade by a threshold switch having an input electrically connected to the amplifier output. The threshold switch will have an output which will be in one voltage state when the input thereto has a voltage signal thereon that is less than a first threshold value, and will be in a second or opposite voltage state when the voltage at the input thereof is greater than a second threshold value. If there is no significant hysteresis in the threshold switch, the first and second threshold values will be substantially equal.
Thus, each comparator determines whether the converter analog input signal voltage magnitude at its inverting or non-inverting input (also the amplifier inputs), as the case may be, is greater or smaller than the magnitude of the reference signal present at the other input. This determination is reflected by the voltage state occurring at the comparator or threshold switch output. This comparison is made, however, only when the clocking signal .phi. supplies an appropriate impulse to comparators 14 to permit them to make and pass along the results of such a comparison.
The outputs of each of the comparators are connected to encoding circuitry, 16, so that the results of the comparisons are passed on to the logic circuitry therein. In the simplest case, this logic circuitry senses all the comparators which have a first voltage state output versus all the comparators which have a second voltage state output and uses this information to uniquely define an n-bit binary number output code at the encoding circuitry output, 17. Alternatively, a coding scheme based on other than binary numbers such as a gray code may be used.
The use of threshold switches permits a stable logic state to be established which then accurately represents whether the linear amplifier output signals are above or below the threshold values of the threshold switches. Thus, the comparators can provide a decision as to whether v.sub.in exceeds or not the corresponding reference signal in a short time period prior to the threshold switch output signal being permitted by the clocking signal to be sent to the encoding circuitry.
In some converter arrangements, the threshold switch is merged with the linear amplifiers to form specific comparators as is shown in FIG. 5. On the other hand, FIG. 5 could have been interpreted so that the comparators 14 were just linear amplifiers with the threshold switches merged with the encoding circuitry, or even that logic gates in the encoding circuitry serve also in some instances as the threshold switches. In such instances, the clocking signal would be supplied to encoding circuitry 16 rather than as shown in FIG. 5.
A further possibility for the linear amplifiers is the use of a single input in place of the noninverting and inverting inputs with this single input switched back and forth at an appropriate rate between the corresponding reference voltage and v.sub.in. Such amplifiers are common in "switched capacitor" circuitry and are often termed "clocked amplifiers".
In any of these arrangements, the primary requirement is that the clock skew, or variation in switching timing upon the occurrence of an enabling pulse in clock signal .phi. between the various comparators, be small so that the sample being taken of the analog input signal is substantially the same at each of the comparators. Variations in threshold values between the various threshold switches is usually not of great importance as the difference in the signals supplied to the inverting and non-inverting inputs of the linear amplifiers have already been amplified on reaching the input to the threshold switch. As a result, this difference has been made either quite positive or quite negative with respect to the threshold values of the switches so that small differences between these threshold values will be insignificant.
Parallel proceeding converters are typically used when higher conversion rates are important because all of the comparisons are made at once, or nearly so, rather than being made successively as in sequentially proceeding converters which takes longer. Further steps in speeding the conversion rate of parallel converters are available such as minimizing the delay through the elements of the converter, and by "pipelining" or overlapping in time some parts of the conversion processing. Nevertheless, as technology advances lead to the desire to convert signals of higher and higher frequency, there is a strong desire to increase the maximum conversion rate in analog-to-digital conversion.